GenieTM-PCIe is a system verilog implementation of the PCI Express (PCIE) standards. It is designed to be a Verification IP and an architecture model to facilitate ASIC designs with a PCIE interface.

ANDOVER, Mass.--(BUSINESS WIRE)--Avery Design Systems Inc., a leader in verification IP, today announced availability of a major new release of the flagship PCIe VIP, major VIP update for eMMC 5.X, ...

TEWKSBURY, Mass.--(BUSINESS WIRE)--Avery Design Systems, leader in functional verification solutions today announced the pre-silicon system simulation solution of NVMe TM SSD and PCIe® designs using ...

Tewksbury, MA., Feb 28, 2022 — Avery Design Systems, a leader in functional verification solutions, today announced its PCI Express Verification IP (VIP) has been selected by Fungible Inc., a data ...

The new Mentor EZ-VIP PCI Express Verification IP from Mentor Graphics Corp. reduces testbench assembly time for ASIC (application-specific integrated circuit) and FPGA (field-programmable gate array) ...

Tewksbury, MA., June 21, 2022 — Avery Design Systems, a leader in functional verification solutions, today announced it has been chosen by eTopus as its verification IP solution partner for eTopus ...